# SK hynix Proposes Shared Memory Racks for AI Inference Systems By Simon Yoon Canonical URL: https://www.tokenpost.com/news/technology/56440 Published: 2026-11-13T07:18:12.000Z Updated: 2026-11-13T07:18:12.000Z Section: Technology > An internal test using remote CXL DRAM cut average time to first token to 15.45 seconds from 80.76 seconds, an approximately 81% reduction. SK hynix said validation with Intel and partners will start in the system-des… SK hynix presented a shared memory architecture for AI servers at the Intel AI Summit in Seoul on Thursday, Nov. 12, proposing dedicated racks to make pooled memory available across multiple machines. The design would place high-capacity memory in dedicated racks that multiple GPU and CPU servers could reach through high-speed links. The racks would sit alongside current server setups. This lets servers draw on a common pool instead of relying only on memory attached to each machine, as agentic AI workloads increase demand for memory capacity and bandwidth. SK hynix said it would validate the architecture with Intel, customers and other strategic partners, starting in the system-design phase. The design targets the key-value (KV) cache, working memory that an AI model builds as a conversation or task unfolds. That cache grows quickly during multi-turn inference, when a model handles a series of exchanges. In SK hynix’s internal test, average time to first token — the delay before a model begins producing a response — was 80.76 seconds with eviction and recompute. Using remote Compute Express Link (CXL) DRAM from a shared pool brought the measure to 15.45 seconds, an approximately 81% reduction. The results are internal, and broader validation is planned. CXL lets processors treat external memory as if it were nearby. Remote direct memory access (RDMA) lets machines read one another’s memory without routing each request through the main processor. SK hynix Vice President Joo Young-pyo pointed to inefficiencies in a conventional setup that attaches high-bandwidth memory (HBM) directly to each GPU. The proposal follows earlier server-memory work between the companies. In December 2025, SK hynix became the first vendor to receive Intel Data Center certification for a 256 GB DDR5 registered dual in-line memory module (RDIMM) on the Xeon 6 platform. The module delivered up to 16% higher inference performance and cut power consumption by approximately 18%. The shared-pool proposal also fits SK hynix’s work on memory for AI inference. The company has outlined ways to distribute KV cache across HBM, DRAM and solid-state drives in its [memory-tiering update](). Validation of the new architecture is set to begin in the system-design phase with Intel, customers and other strategic partners. ## Links in this article - [memory-tiering update](https://www.tokenpost.com/news/technology/42424)