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Symatics Introduces MPU Architecture to Speed Interactive AI Inference

The architecture pairs row-and-column parallel processing with compiler-planned execution to reduce transfers between memory and computing units. Technical validation is underway.

A fine grid etched across an unmarked semiconductor wafer / TokenPost.ai
A fine grid etched across an unmarked semiconductor wafer / TokenPost.ai

Singapore semiconductor startup Symatics introduced its Morphic Processing Unit (MPU) architecture at the 2026 Business & Philanthropy Forum on Friday, Nov. 6, targeting interactive AI and inference with a design intended to speed responses.

The architecture combines row-and-column parallel processing with compiler-planned execution to reduce transfers between memory and computing units.

Symatics plans to work with Singapore research institutions and industry partners through an open architecture and licensing model. The project remains in research and development, with technical validation underway. The company has not disclosed financing, prototype-chip or tape-out progress.

Simon Yoon

Reporter

Simon Yoon reports on blockchain technology for TokenPost. Send corrections or tips to info@tokenpost.com.

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