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Samsung and SK Hynix Urged to Secure HBM Co-Design Roles

Sungkyunkwan University chemical engineering professor Kwon Seok-joon outlined four paths for Taiwan Semiconductor Manufacturing Co. (TSMC) to expand into higher-value memory work. A former SK Hynix executive warned S…

Memory dies align above a base die on a bonding stage / TokenPost.ai (mono)
Memory dies align above a base die on a bonding stage / TokenPost.ai (mono)

Samsung Electronics and SK Hynix face calls to secure HBM co-design roles as NVIDIA and TSMC could control the finished memory’s design and manufacturing if TSMC takes on hybrid bonding.

NVIDIA introduced its custom NVHBM design in August, integrating its memory controller into the base die, the bottom chip in an HBM stack. The base die handles memory control functions. Taiwan Semiconductor Manufacturing Co. (TSMC) is already a key partner in SK Hynix’s HBM production and has said it will remain focused on its foundry business.

Kwon Seok-joon, a chemical engineering professor at Sungkyunkwan University, outlined four ways TSMC could expand into higher-value memory work without operating its own DRAM plant: produce more base dies, take on hybrid bonding, work with Taiwanese DRAM makers and manufacture peripheral circuits for 3D DRAM.

Hybrid bonding joins chips directly without microbumps. Kwon said the process could become more important as HBM stacks approach about 20 layers. If TSMC takes on hybrid bonding while SK Hynix continues supplying the core DRAM dies, NVIDIA and TSMC could control the finished memory’s design and manufacturing.

A former senior SK Hynix executive warned that South Korea’s two major memory manufacturers could be reduced to DRAM-cell suppliers if they fail to lead in base-die design, bonding and heat management as stacks move beyond 20 layers.

Kwon urged South Korean companies to become co-designers of base dies and reach mass production in hybrid bonding before TSMC. He also called for them to seek custom HBM business from Google, AMD and Meta, as well as NVIDIA.

Kim Yong-seok, head of Gachon University’s semiconductor education institute, called for early research in 2.5D and 3D packaging, HBM interfaces and high-performance memory-system design. He also urged government support for talent and infrastructure focused on integrating logic and memory design.

Simon Yoon

Reporter

Simon Yoon reports on blockchain technology for TokenPost. Send corrections or tips to info@tokenpost.com.

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