Micron Maps HBM Roadmap Through 2030, Sees Memory Imbalance for Two Years

Micron has mapped high-bandwidth memory through 2030 and set second-half 2027 ramp targets for DRAM and NAND as the company expects memory supply and demand to remain out of balance.

The roadmap places HBM4 in 2026, followed by HBM4E in 2027, HBM5 in 2028, HBM5E in 2029 and HBM6 in 2030. Custom HBM starts with HBM4E. The dates add product detail to a preview of Micron’s technology webinar, which took place Oct. 21.

Micron President and Chief Technology and Products Officer Scott DeBoer presented the roadmap at the webinar. Its 1δ DRAM node targets a volume ramp in the second half of 2027 and a bit-density improvement in the mid-20s percentage range. Micron designed the node for HBM5, vertical HBM and vertical edge-inference memory.

The G11 NAND plan also targets a second-half 2027 ramp. The design uses wafer-on-wafer bonding and more than 400 layers, with target bit density twice that of G9 and I/O speed 1.5 times that of G9. Micron’s move from Gen9 to Gen11 is intended to optimize NAND for future AI workloads.

The company also described vertical HBM, which places memory directly above processing units, and TSV-stacked NAND positioned closer to accelerators. HBM supports bandwidth-heavy workloads, while NAND provides storage. These designs place memory and storage in different positions within AI systems.

Micron does not expect memory supply and demand to reach balance over the next two years. “We actually do not see a time when it comes into balance,” DeBoer said.